Application Note 1022 Boundary-Scan, Silicon and Software Enable System Level Embedded Test

Designing IC’s, boards, and systems with a DFT strategy that utilizes boundary-scan, will make a quantum improvement in test development cycle-time, and fault coverage both in production and in the field. Tools are commercially available that automate design, test development, and ultimately embedded test for IEEE 1149.1 compatible systems. This paper is intended to familiarize designers and test engineers with the advantages of boundary-scan at the system level as well as present the architectural and implementation challenges of developing Fairchild’s SCAN EASE software. For more information, refer to AN-1037, “Embedded IEEE 1149.1 Test Application Example.”